Self-wiring supercomputer is cool and compact

 作者:阿屯     |      日期:2019-03-03 08:05:01
By Will Knight An experimental supercomputer made from hardware that can reconfigure itself to tackle different software problems is being built by researchers in Scotland. The system under construction at the Edinburgh Parallel Computing Centre – part of Edinburgh University, UK – will use Field Programmable Gate Array (FPGA) chips instead of conventional microprocessors. FPGAs can be reconfigured using software to mimic computer processing equipment that is physically designed to take on specialised tasks. In contrast, conventional microprocessors are designed to act as fixed, general purpose processing devices. Each FPGA chip consists of a block of programmable logic gates that can be electronically organised into different types of circuit. The FPGA supercomputer will be more powerful and efficient than a conventional system of similar physical size. If it can be made easy enough to program, the researchers behind the machine say it could usher in a new generation of compact and energy-saving supercomputers over the coming decade. Conventional microprocessors are not just inefficient to program for specific tasks but are also becoming increasingly complex. This means they can consume thousands of watts of power and require specialised cooling. “The whole supercomputing community needs to look beyond the microprocessor,” says Mark Parsons at Edinburgh University. Once configured, a FPGA chip is faster, smaller and less power-hungry. Researchers at the centre have begun building a computer that will incorporate 64 FPGA processing units and be capable of operating at 1 teraflop – one trillion mathematical operations per second. This is fairly modest by modern supercomputing standards, as the fastest machines can operate at hundreds of teraflops. But the Edinburgh system will be up to 100 times more energy efficient than a conventional supercomputer of equivalent computing power. The 64-node FPGA machine will also need only as much space as four conventional PCs, while a normal 1 teraflop supercomputer would fill a room. But figuring out how to make the FPGA chips work together efficiently represents a challenge. “No one has ever tried to build a big supercomputer with these chips before,” Parsons says. “The supercomputer we’ve come up with is an absolutely unique system.” “It’s an extremely efficient processing engine,” adds Allan Cantle, chief executive of Nallatech, a company that makes software tools for FPGA programmers. “But the main challenge with the technology is programming it.” FPGA hardware is more difficult to program, because a programmer must understand how to tweak the underlying hardware to get the most out of it. However, an alliance formed between the Edinburgh Parallel Computing Centre and several FPGA companies – called the FPGA High Performance Computing Alliance (FHPCA) – will develop software tools to enable programmers to create code for FPGA chips more easily. Once the 64-node machine is built, the designers will try to transfer several existing supercomputer programs onto the new hardware using these tools. “If we can get these [programs] to work, we’ll know that we have a general purpose solution,